Accordingly, a conventional flash storage is shown in FIG. 1. A flash storage 10 mainly comprises a micro-controller 11, a registered memory 15, and at least one flash memory (device) 13, in which the micro-controller 11 may be connected to the registered memory 15, the flash memory 13, and a application system 17, while the flash memory 13 comprises therein a plurality of physical memory blocks 131, each of physical memories having one physical address 135.
Generally, the application system 17 may be allowed to only read or assign a logical memory block 112 virtually presented in the micro-controller 11, a plurality of the logical memory blocks 112 being located in a logical memory block address (HBA) 111, according to the not exactly the same data access protocol between the application system 17 and the flash storage 10. By means of the operation of micro-controller 11, each of logical memory blocks 112 to be accessed by the application system 17 may be corresponded to a corresponding physical memory block 131 in the flash memory 13, and again there may be presented with a corresponding relation between a logical address 1125 of the logical memory block 112 and a physical address 135 of the corresponding physical memory block 131, while the latter two are recorded in a logical address column 153 and a physical address column 155, respectively, of a linkage table 151 being stored in the registered memory 15.
Furthermore, in each of flash memories 13, there is provided with a memory type block 133 having memory ID data 137 stored therein. Again, in the micro-controller 11, there is also provided with a corresponding memory program unit 113 having a plurality of memory accessing programs 115 stored therein, each memory accessing program 115 also having matched memory ID data (flash ID code) 117. The memory ID data 137 is read when the micro-controller 11 is started (read ID command), whereby one corresponding memory ID data 117 and memory accessing program 115 in the memory program unit 113 may be selected to be the executive program for the micro-controller 11 in relation to the flash memory 13 of this type.
Moreover, referring to FIG. 1A cooperatively, when the data accessing operation with respect to one logical memory block 112 having a logical location of m is desired by the application system 17, the corresponding physical memory block 131 with the physical address 135 recorded as n may be found in the linkage table 115 by the micro-controller 11. In accordance with the record of replacement data 139 in the physical memory block 131, however, the physical memory block 131 has been damaged or stored with various data. Therefore, the data desired to be accessed should be presented in a physical memory block 1312 with a physical address 1352 registered as 5, while the data originally presented in the physical memory block 1312 may be moved to another physical memory block 1313 with a physical address 1353 registered as 1, and then the fact that the data having been stored in the physical memory block 1313 may be written into the replacement data 139 in the physical memory block 1312 after this data movement is completed.
Furthermore, referring to FIG. 1B, the interior of the flash storage 10 is presented with a system clock consisting of a plurality of rising edges 191 and a plurality of falling edges 195. However, the data access signal of the micro-controller 11 may be changed only at the rising edges 191 of the system clock.
Although the effect of data access has been provided for the conventional flash storage 10, there are still drawbacks as follows:
1. Writing data into the replacement data of the physical memory block may be allowable only when the data accessing operation is completed, and there is no consistency between the physical memory block and the replacement data so as to produce damage in accessed data if an abnormal behavior, such as power failure and so on, occurs at this time.
2. The linkage table is used to record the relationship between the physical address and logical address of the whole flash memory and the size thereof increases as the number of the physical memory block in the flash memory increases, thereby the capacity of the flash memory must be also increased correspondingly.
3. In the micro-controller, only the memory accessing program and category of flash memory having been registered in the memory program unit thereof may be executed, and on the contrary, the connected flash memory may be not accepted or executed by the micro-controller if the category or type thereof is not registered in the memory program unit.
4. The change in the data access signal of the micro-controller should occur at the rising edges of the system clock only, in such a way that the timely adjustment of internal frequency is impossible, thereby incapability of saving electrical power effectively.